Pong Game on Zybo Board

Introduction

This is a VHDL project using:

• Zynq Zybo-7000
• Xilinx Vivado 2018.2
• Xilinx SDK 2018.2

Github

Block Diagram

Features

• 800x600@60Hz VGA Display. VGA controller referenced from Digi-Key

  • AXI register map created using airhdl.

  • Characters saved in ROM in vectors(8*8 pixels format).

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    constant FONT: rom :=
    (
    x"00",x"18",x"24",x"24",x"3C",x"24",x"24",x"00", ---- Character A
    x"00",x"38",x"24",x"38",x"24",x"24",x"38",x"00", ---- Character B
    x"00",x"18",x"24",x"20",x"20",x"24",x"18",x"00", ---- Character C
    x"00",x"38",x"24",x"24",x"24",x"24",x"38",x"00", ---- Character D
    ......
    );

  • 8*8 pixels ball stored in ROM:

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    -- 16 X 16 pixel ball
    constant BALL: rom_ball :=

    "0000011111100000", -- *****
    "0001110101011000", -- *** * ***
    "0010000010101100", -- * ***
    "0110000000010110", -- ** ***
    "0100000001010110", -- * ***
    "1000000000010011", -- * **
    "1000000000101111", -- * *****
    "1000000000010101", -- * ***
    "1000000001010011", -- * * **
    "1010100001010111", -- * *** *****
    "1010101010111011", -- * *** ***** **
    "0101010101001010", -- *** ***** ***
    "0100000001010110", -- * ***
    "0011101101011100", -- *** ** *****
    "0001111011111000", -- ***** *****
    "0000011111100000" -- *****
    );

  • Two players: Left and Right.

Controlled by GPIO buttons.

• Scoreboard available. When one of the players gets 10 scores, the game ends.

Notes

This is my first time writing VHDL and developing a software-controlled design in Xilinx SDK. The code in the VGA image source is not well organized, especially if the user wants to add a certain character to the game, it needs to be rewritten and the bitstream needs to be generated again for the SDK to work, and also the register map should be updated.